Kevin Glass Intel Corp

2200 Mission College Blvd. Santa Clara, CA 95054
Principal Engineer, Senior Design Manager
Radio Frequency Operations
• Radio systems architecture for CMOS, BiCMOS/SiGe UMTS multimode cellular phone chipset. Developed link budget system spreadsheet; receiver line-up, including, gain, bandwidth, noise figure, and IIP3, for each circuit block, and A/D dynamic range, to meet WCDMA and EDGE 3GPP requirements. Reviewed transmitter architecture options to merge WCDMA with EDGE. Specified and designed key CMOS, BiCMOS/SiGe circuit blocks.
• Developed a break through architecture for low voltage MEMs RF switches. Fast track patent awarded for this design.
• Developed Fractional N Frequency Synthesizer architectures to implement agile and software defined radio, and direct modulation for highly variable PA characteristics and power level control. IDFs submitted and 1 patent filed.
• Fractional N Frequency Synthesizer - Design and Development of advanced Frequency Synthesizer employing delta-sigma modulation for improved close in carrier phase noise, and polar transmit modulation to eliminate transmitter modulator and up conversion mixer. Design supports Edge, GPRS, and GSM. 1 patent issued. Activity included the following:
1. Synthesizer Architecture – Developed Verilog and Matlab Analog Behavioral Models. Specified DSP algorithms.
2. Designed critical PLL circuits including, VCO, multimode prescaler, delta-sigma modulator/divider/phase accumulator, PFD/Charge Pump/Loop Filter employing newly derived biquad, voltage regulator employing newly developed self-biased folded cascode opamp, and loop calibration.
3. Coordination of synthesizer floor-planning and layout. Development of mixed signal/ logic design methodologies.
4. Demonstrated first silicon functionality of synthesizer design. Passed FTA qualification.
• Member of WCCG strategic capabilities group, and DTTC technical reviewer. Panelist for 2003 GaAs IC symposium.
Optical Network Group Phontonics Technology Group Microprocessor Products Group - Key Manager and Contributor to Itanium Projects