A Sr. algorithm design engineer at Microsemi. Developed several telecom industry products. In
particular, VDSL, TDM and DSP chipsets including firmware for acoustic echo cancellation systems. In the
past few years, I've been a part of the timing and sync group at Microsemi. I’ve been involved in
developing timing over packet synchronization products as well as programmable PLLs. My research interests also include statistical and adaptive signal processing, coding theory and compressive sensing. A hockey fan. I enjoy golfing, biking and winter sports.

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