Chandana Deshpande
Student and Firmware engineer in Grenoble , France
I am a final year doctoral student at TIMA laboratory specialising in processor core microarchitecture. My expertise include design and implementation of an Out-of-Order (OoO) CPU with the particular focus on back end of microarchitecture in gem5 simulator. Part of my thesis work have been published in IEEE CAL (Computer Architecture Letters) in 2023 and submitted to a ACM TACO in 2025. I would be delighted to discuss my ongoing thesis and pass projects in more detail.