Kevin Glass
Electrical Engineer, Integrated Circuit Design, and Communications Systems in Scottsdale, Arizona
Kevin Glass is a technical leader with extensive experience in the successful design and development of some of the most advanced chips in the semiconductor industry. Consistent first time success, the result of innovation, leadership, organization, and attention to detail. Chip designs range from high volume products, to advanced R&D technology developments including: mm-wave 10-44GHz+ fiber optic, data conversion, and radio components; Cellular handset RF frontends and synthesizers, and high MIPs/watt programmable DSPs; along with the most advanced highest performance microprocessors. Aggressive projects on aggressive schedules with prodigious IP production.
Kevin Glass has a BSEE and MSEE with Work completed towards a PhDEE
KEVIN GLASS CORE COMPETENCIES
Wireless: Systems Architecture and Analysis; GSM, EDGE, WCDMA, UMTS, LTE, 3GPP, ETSI; Receiver and Transmitter Line Ups, Sensitivity, EVA, Zero IF; Fractional N Frequency Synthesizers; A/D, D/A, Delta Sigma; Band Pass Delta Sigma; LNAs, Mixers, Filters, Opamps, LDOs, References. Tools: Cadence, Spectre RF, ADS, Matlab, Excel, VerilogA, Msim.
Fiber Optics: System Analysis, OC-192, OC-768, 802.3ae, 802.3ba, 100G OIF, OTN; Coherent Receiver, 66Gsps A/D, Transmit Pre-distortion; 44GHz Laser and Modulator Drivers, CDR, Mux, De-Mux, TIA, and Limiting Amps, mm-Wave; Modules; Laser Biasing; CMOS Active Pixel Arrays. Tools: Cadence Spectre RF, HFSS, Sonnet, Matlab, Excel.
Microprocessors/DSP/VLSI: Micro-Architecture Development, x86, MIPs, iA64, ARM, DSPs, Computer Arithmetic, Cache, Floating Point, Memories, High-Speed Data path, Logic Design, Chip Planning, Performance Modeling and Validation, Timing Verification, Design Methodology, Chip Planning, Process Modeling. Tools: Cadence, Verilog, Spectre, C, C++, may other tools.Management: Planning, Scheduling, Product Definition, Market Analysis, Multinational, Responsible for up to 30 engineers.Management: Planning, Scheduling, Product Definition, Market Analysis, Multinational, Responsible for up to 30 engineers.
Management: Planning, Scheduling, Product Definition, Market Analysis, Multinational, Responsible for up to 30 engineers.