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This is actually the eye diagram for that transmit pair. The get pair is quite equivalent. It really is a LAN8700 PHY, and I've got the MII interface cheap snapbacks proficiently disabled, so the PHY is transmitting IDLE code sequences. It really is forced into 100Mbit/FDX as per the datasheet. 100Mbit/HDX is identical.

Correction: The design is applying the LAN8700's internal one.8V provide to power its VDD_CORE net; I should have been perplexing the one.8V logic provide using the VDD_CORE supply in my earlier description. It seems to me that electrical power supply noise is not such a large likelihood, considering the fact that the higher, zero and reduced levels are basically very good. That's, the eye is not "squished." The truth that the violations all seem like extremely excellent transitions, just "skewed" in time helps make me think the trouble lies while in the crystal or provide for the crystal driver/PLL from the PHY.

If I let the eye diagram run (about 15min) the violations inside the mask "fill in" such that the white violations you see from the picture come to be white chevron (>) shapes while in the right-hand sides of the blue masks. This would tell me that the timing errors are far more or wholesale snapbacks less randomly distributed rather then some kind of discrete noise yanking the timing off an precise volume.

The crystal that the PHY is applying has a 30ppm spec and that is properly inside of the 100ppm 802.three spec, and also inside of the 50ppm encouraged spec that the PHY specifies. I'm working with loading capacitors which match what the crystal is seeking, and is pretty close to what the LAN8700 specifies as its nominal capacitance.

Ahead of I disabled the MII interface I'd see framing mistakes (as reported my Linux's ifconfig plan). There aren't any mistakes if I force the link to 10Mbit.

Among the quite odd issues I've observed is the fact that if I set the scope as much as set off to the RX_ER (acquire error) signal from the PHY towards the MAC, it never ever signals an error even though the frame mistakes accumulate from the MAC reports. Now from studying the datasheet for the PHY, it really is clear that you will find in fact pretty handful of predicaments the place RX_ER would assert, but I locate it quite hard to believe that with an eye diagram like what I'm seeing the errors are essential